MULTILEVEL METALLIZED DSA MOS MASTERSLICE

被引：4

作者：

OHKURA, I

TOMISAWA, O

NAKAYA, M

OHBAYASHI, Y

NAKANO, T

机构：

[1] LSI Development Laboratory, Mitsubishi Electric Corporation, Itami, Hyogo 664, Japan

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1979年 / 14卷 / 04期

关键词：

D O I：

10.1109/JSSC.1979.1051258

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new LSI with high-speed capability and high-packing density for computer use has been successfully achieved within a short turnaround time by a new DSA MOS masterslice. Two-level metallization has been accomplished by the use of full plasma processes. The average gate delay time of the new masterslice was improved to 2 ns compared with 3 ns in the case of single-level metallization. Copyright © 1979 by The Institute of Electrical and Electronics Engineers, Inc.

引用

页码：764 / 766

页数：3