Dead-time free pixel readout architecture for ATLAS front-end IC

被引：9

作者：

Einsweiler, K ^{[1
]}

Joshi, A ^{[1
]}

Kleinfelder, S ^{[1
]}

Luo, L ^{[1
]}

Marchesini, R ^{[1
]}

Milgrome, O ^{[1
]}

Pengg, F ^{[1
]}

机构：

[1] Univ Calif Berkeley, Lawrence Berkeley Lab, Berkeley, CA 94720 USA

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 1999年 / 46卷 / 03期

关键词：

D O I：

10.1109/23.775508

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A low-power, sparse-scan, readout architecture has been-developed for the ATLAS pixel front-end electronics. The architecture supports a dual discriminator and extracts the time over threshold (TOT) information along with a 2-D spatial address of the hits and associates them with a unique 7-bit beam crossing number. The IC implements level-1 trigger filtering along with event building (grouping together all hits in a beam crossing) in the end of column (EOC) buffer. The events are transmitted over a 40 MHz serial data link with the protocol Supporting buffer overflow handling by appending error flags td events. This mixed-mode full custom IC is implemented in 0.8 mu HP process to meet the requirements for the pixel readout in the ATLAS inner detector. The circuits have been tested and the IC has been found to provide deadtime-less ambiguity-free readout at 40MHz data rate.

引用

页码：166 / 170

页数：5