The Stanford Hydra CMP

被引：141

作者：

Hammond, L ^{[1
]}

Hubbert, BA ^{[1
]}

Siu, M ^{[1
]}

Prabhu, MK ^{[1
]}

Chen, M ^{[1
]}

Olukotun, K ^{[1
]}

机构：

[1] Stanford Univ, Stanford, CA 94305 USA

来源：

IEEE MICRO | 2000年 / 20卷 / 02期

基金：

美国国家科学基金会;

关键词：

the Department of Electrical Engineering at Stanford University. He is currently investigating methods of parallel program development for chip multiprocessors. Prabhu has an SB degree in engineering sciences from Harvard University and an MS in electrical engineering from Stanford University. His research has been funded in part by the National Science Foundation and by the Alliance for Innovative Manufacturing at Stanford.US Defense Advanced Research Projects Agency contracts DABT 63-95-C-0089 and MDA 904-98-C-A933 provided research funding;

D O I：

10.1109/40.848474

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

CHIP MULTIPROCESSORS OFFER AN ECONOMICAL, SCALABLE ARCHITECTURE FOR FUTURE MICROPROCESSORS. THREAD-LEVEL SPECULATION SUPPORT ALLOWS THEM TO SPEED UP PAST SOFTWARE.

引用

页码：71 / 84

页数：14

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