Towards the ultimate storage device: the fabrication of an ultra high density memory device with 193nm lithography

被引:3
作者
Cirelli, RA [1 ]
Bude, J [1 ]
Mansfield, WM [1 ]
Timp, GL [1 ]
Klemens, FP [1 ]
Watson, GP [1 ]
Weber, GR [1 ]
Sweeney, JR [1 ]
Houlihan, F [1 ]
Gabor, A [1 ]
Baumann, F [1 ]
Buonanno, M [1 ]
Forsyth, GF [1 ]
Barr, D [1 ]
Lee, TC [1 ]
Rafferty, C [1 ]
Hutton, S [1 ]
Timko, A [1 ]
Hergenrother, J [1 ]
Reichmanis, E [1 ]
Harriott, LR [1 ]
Hillenius, SJ [1 ]
Nalamasu, O [1 ]
机构
[1] AT&T Bell Labs, Lucent Technol, Murray Hill, NJ 07974 USA
来源
MICROLITHOGRAPHY 1999: ADVANCES IN RESIST TECHNOLOGY AND PROCESSING XVI, PTS 1 AND 2 | 1999年 / 3678卷
关键词
D O I
10.1117/12.350213
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We describe the fabrication of the world's smallest fully functional conventional non-volatile memory device using 193nn lithography for all levels. The cell area of the smallest devices fabricated was 0.0896 mu m(2). The critical level of the device, to define the channel length, was exposed with an alternating aperture phase shift mask Floating gate dimensions ranged from 0.080 to 0.14 mu m. Subsequent lithography, to define the control gate utilized a binary mask with gate dimensions down to 0.16 mu m. A multi-layer ARC was used to reduce substrate reflections and maintain linewidth control over topography. All levels were exposed with a new single layer chemically amplified resist developed for 193nn lithography. We will present results for line width control, etch bias, implementation of resolution enhancement techniques as well as issues with process integration. Figure 1 is an SEM photo of 0.08 mu m gates, as defined in resist, using a strong phase shift mask Figure 2 is an AFM image of the same features, after etch into the nitride/poly/oxide film stack. The final line width (measured by AFM) was 0.074 mu M.
引用
收藏
页码:295 / 304
页数:10
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