Low voltage NVG(TM): A new high performance 3 V/5 V flash technology for portable computing and telecommunications applications

被引：4

作者：

Bergemont, A

Chi, MH

Haggag, H

机构：

[1] Fairchild Research Center, National Semiconductor, Santa Clara

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1996年 / 43卷 / 09期

关键词：

D O I：

10.1109/16.535343

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new concept for law voltage NOR Virtual Ground (NVG(TM)) Flash memory with a fast access time is introduced. New array concepts and process technologies are introduced to achieve programming by 5 V V-pp and reading at 3 V +/- 10% V-cc. The array performance is enhanced by segmentation and using extra access transistor for Each segment. The control of the erased cell threshold voltage distribution is one of the key issues for the 3 V read operation in low voltage flash. The Erase threshold distribution is minimized by Fowler-Nordheim tunneling and hot electron injection self-recovering techniques.

引用

页码：1510 / 1517

页数：8

共 13 条

[1]

Bergemont A., 1993, International Electron Devices Meeting 1993. Technical Digest (Cat. No.93CH3361-3), P15, DOI 10.1109/IEDM.1993.347409

[2]

BERGEMONT A, 1995, NONV SEM MEM WORKSH

[3]

BERGEMONT A, 1995, LOW VOLTAGE NVGTM NE

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