Design and construction of the high-speed optoelectronic memory system demonstrator

被引：5

作者：

Barbieri, Roberto ^{[2
]}

Benabes, Philippe ^{[6
]}

Bierhoff, Thomas ^{[5
]}

Caswell, Josh J. ^{[1
]}

Gauthier, Alain ^{[6
]}

Jahns, Juergen ^{[3
]}

Jarczynski, Manfred ^{[3
]}

Lukowicz, Paul ^{[2
]}

Oksman, Jacques ^{[6
]}

Russell, Gordon A. ^{[1
]}

Schrage, Juergen ^{[5
]}

Snowdon, John F. ^{[1
]}

Stuebbe, Oliver ^{[4
]}

Troster, Gerhard ^{[2
]}

Wirz, Marco ^{[2
]}

机构：

[1] Heriot Watt Univ, Edinburgh EH14 4AS, Midlothian, Scotland

[2] ETH, Zurich Elect Lab, CH-8805 Zurich, Switzerland

[3] Fern Univ Hagen, D-58084 Hagen, Germany

[4] Univ Gesamthsch Paderborn, C LAB OIT, D-33102 Paderborn, Germany

[5] Univ Gesamthsch Paderborn, Siemens AG SIS C LAB OIT, D-33102 Paderborn, Germany

[6] Ecole Super Elect, Serv Mesures, F-1192 Gif Sur Yvette, France

来源：

APPLIED OPTICS | 2008年 / 47卷 / 19期

关键词：

D O I：

10.1364/AO.47.003500

中图分类号：

O43 [光学];

学科分类号：

070207 ; 0803 ;

摘要：

The high-speed optoelectronic memory system project is concerned with the reduction of latency within multiprocessor computer systems (a key problem) by the use of optoelectronics and associated packaging technologies. System demonstrators have been constructed to enable the evaluation of the technologies in terms of manufacturability. The system combines fiber, free space, and planar integrated optical waveguide technologies to augment the electronic memory and the processor components. Modeling and simulation techniques were developed toward the analysis and design of board-integrated waveguide transmission characteristics and optical interfacing. We describe the fabrication, assembly, and simulation of the major components within the system. (c) 2008 Optical Society of America.

引用

页码：3500 / 3512

页数：13

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