An effective model for analysing tunneling gate leakage currents through ultrathin oxides and high-k gate stacks from Si inversion layers

被引:21
作者
Govoreanu, B
Blomme, P
Henson, K
Van Houdt, J
De Meyer, K
机构
[1] IMEC, B-3001 Heverlee, Belgium
[2] Katholieke Univ Leuven, B-3001 Heverlee, Belgium
关键词
tunneling current; inversion layer; quasibound state lifetime; high-k dielectrics; gate dielectric scalability;
D O I
10.1016/j.sse.2003.09.031
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, a model for describing tunneling from Si inversion layers is discussed. The model accounts for the quantization effects at the silicon/dielectric interface and is able to closely follow the self-consistent calculation of the potential and inversion charge in an inverted MOS structure. It is also applicable to multilayer gate stacks, since a general procedure is used for calculating the transmission through dielectric stacks. Influence of both material and geometrical parameters of a dual layer stack are discussed and scaling projections are inferred. (C) 2003 Elsevier Ltd. All rights reserved.
引用
收藏
页码:617 / 625
页数:9
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