SpiNNaker: Mapping Neural Networks onto a Massively-Parallel Chip Multiprocessor

被引：166

作者：

Khan, M. M. ^{[1
]}

Lester, D. R. ^{[1
]}

Plana, L. A. ^{[1
]}

Rast, A. ^{[1
]}

Jin, X. ^{[1
]}

Painkras, E. ^{[1
]}

Furber, S. B. ^{[1
]}

机构：

[1] Univ Manchester, Sch Comp Sci, Manchester, Lancs, England

来源：

2008 IEEE INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOLS 1-8 | 2008年

关键词：

D O I：

10.1109/IJCNN.2008.4634199

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

SpiNNaker is a novel chip - based on the ARM processor - which is designed to support large scale spiking neural networks simulations. In this paper we describe some of the features that permit SpiNNaker chips to be connected together to form scalable massively-parallel systems. Our eventual goal is to be able to simulate neural networks consisting of 10(9) neurons running in 'real time', by which we mean that a similarly sized collection of biological neurons would run at the same speed. In this paper we describe the methods by which neural networks are mapped onto the system, and how features designed into the chip are to be exploited in practice. We will also describe the modelling and verification activities by which we hope to ensure that, when the chip is delivered, it will work as anticipated.

引用

页码：2849 / 2856

页数：8