Efficient embedded neural-network-based license plate recognition system

In this paper, a video processing methodology for a field-programmable gate array (FPGA)-based license plate recognition (LPR) system is researched. The raster scan video is used as an input with low memory utilization. During the design, Gabor filter, threshold, and connected component labeling (CCL) algorithms are used to obtain license plate region. This region is segmented into disjoint characters for the character recognition phase, where the self-organizing map (SOM) neural network is used to identify the characters. The system is portable and relatively faster than computer-based recognition systems. The robustness of the system has been tested with a large database acquired from parking lots and a highway. The memory requirements are uniquely designed to be extremely low, which enables usage of smaller FPGAs. The resulting hardware is suitable for applications where cost, compactness, and efficiency are system design constraints.