Gate-first processed FUSI/HfO2/HfSiOx/Si MOSFETs with EOT=0.5 nm -: Interfacial layer formation by cycle-by-cycle deposition and annealing

被引：31

作者：

Takahashi, M. ^{[1
]}

Ogawa, A. ^{[1
]}

Hirano, A. ^{[1
]}

Kamimuta, Y. ^{[1
]}

Watanabe, Y. ^{[1
]}

Iwamoto, K. ^{[1
]}

Migita, S. ^{[2
]}

Yasuda, N. ^{[1
]}

Ota, H. ^{[2
]}

Nabatame, J. ^{[1
]}

Toriumi, A. ^{[2
]}

机构：

[1] MIRAI ASET, AIST Tsukuba W 7,16-1 Onogawa, Tsukuba, Ibaraki 3058569, Japan

[2] AIST, MIRAI ASRC, Tsukuba, Ibaraki 3058569, Japan

来源：

2007 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, VOLS 1 AND 2 | 2007年

关键词：

D O I：

10.1109/IEDM.2007.4418990

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

We have successfully fabricated a 0.5 nm FUSI-NiSi/HfO2/HfSiOx/Si gate stack structure with the gate-first process. The HfSiOx interfacial layer was formed by the cycle-by-cycle deposition and annealing process, followed by the in-situ layer-by-layer deposition and annealing for HfO2 growth. The gate leakage current of 10 A/cm(2) at V-fb - 1.0 V and the effective electron mobility of 120 cm(2)/Vs at 0.8 MV/cm were obtained for n-MOSFET with EOT = 0.49 nm.

引用

页码：523 / +

页数：3

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