Analogue delay-locked loop for spatial-phase locking

被引：4

作者：

Goodberlet, J

Ferrera, J

Smith, HI

机构：

[1] Research Laboratory of Electronics, Massachusetts Intitute of Technology, Cambridge

来源：

ELECTRONICS LETTERS | 1997年 / 33卷 / 15期

关键词：

electron beam lithography; analogue circuits; phase-locked loops;

D O I：

10.1049/el:19970858

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An analogue delay-locked loop has been developed for spatial-phase locking in a scanning electron-beam lithography system. The loop improves pattern-placement precision to 3 sigma similar or equal to 12 nm, by referencing all writing to a 400 nm-period grating. Results compare well with a numerical simulation.

引用

页码：1269 / 1270

页数：2

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