共 5 条
[1]
Glass E, 1997, IEEE MTT-S, P1399, DOI 10.1109/MWSYM.1997.596590
[2]
Current path optimized structure for high drain current density and high gate-turn-on voltage enhancement mode heterostructure field effect transistors
[J].
GAAS IC SYMPOSIUM - 20TH ANNUAL, TECHNICAL DIGEST 1998,
1998,
:198-201
[3]
Hayama N, 1997, IEEE MTT-S, P1307, DOI 10.1109/MWSYM.1997.596567
[4]
Device and process optimization for a low voltage enhancement mode power heterojunction FET for portable applications
[J].
GAAS IC SYMPOSIUM - 19TH ANNUAL, TECHNICAL DIGEST 1997,
1997,
:55-58
[5]
Wu DW, 1997, IEEE MTT-S, P1319, DOI 10.1109/MWSYM.1997.596570