Impact of mu A-ON-current gate-all-around TFT (GAT) for static RAM of 16Mb and beyond

被引:2
作者
Maegawa, S
Ipposhi, T
Maeda, S
Kuriyama, H
Kohno, Y
Inoue, Y
Miyoshi, H
Hirao, T
机构
来源
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | 1996年 / 35卷 / 2B期
关键词
TFT; SRAM; LCD; double-gate transistor; gate-all-around structure; performance variation;
D O I
10.1143/JJAP.35.910
中图分类号
O59 [应用物理学];
学科分类号
摘要
The gate-all-around thin-film transistor (TFT) (GAT) with thin channel poly-Si can suppress the individual performance variation induced by a poly-Si grain boundary in the channel, in addition to improving the average performance compared to the conventional single-gate TFT (SGT). This effect is attributed to the thinning of the effective channel poly-Si by hall in the GAT. Poly-Si TFT simulation results clearly confirmed this effect in terms of the current(I)-voltage(V) characteristics and channel potential. The GAT also reduces the threshold voltage instability under negative bias temperature (-BT) stress because the GAT structure relaxes the stress electric field in the gate oxide. The high-performance GAT enables reduction of the size of the static random access memory (SRAM) cell by providing a large ON-current to the storage node and enhancing the data retention stability despite the low cell ratio. The GAT-SRAM cell is a strong candidate for SRAM of 16 ML and beyond.
引用
收藏
页码:910 / 914
页数:5
相关论文
共 8 条
[1]  
ADAN AO, 1990, P S VLSI TECHNOLOGY, P19
[2]  
FUKUSHIMA Y, 1993, 1993 INT C SOL STAT, P993
[3]   MECHANISM OF NEGATIVE-BIAS TEMPERATURE INSTABILITY IN POLYCRYSTALLINE-SILICON THIN-FILM TRANSISTORS [J].
MAEDA, S ;
MAEGAWA, S ;
IPPOSHI, T ;
NISHIMURA, H ;
ICHIKI, T ;
MITSUHASHI, J ;
ASHIDA, M ;
MURAGISHI, T ;
INOUE, Y ;
NISHIMURA, T .
JOURNAL OF APPLIED PHYSICS, 1994, 76 (12) :8160-8166
[4]   A 0.4 MU-M GATE-ALL-AROUND TFT (GAT) USING A DUMMY NITRIDE PATTERN FOR HIGH-DENSITY MEMORIES [J].
MAEGAWA, S ;
IPPOSHI, T ;
MAEDA, S ;
NISHIMURA, H ;
TANINA, O ;
KURIYAMA, H ;
INOUE, Y ;
NISHIMURA, T ;
TSUBOUCHI, N .
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 1995, 34 (2B) :895-899
[5]   CONTROLLING THE SOLID-PHASE NUCLEATION OF AMORPHOUS SI BY MEANS OF A SUBSTRATE STEP STRUCTURE AND LOCAL PHOSPHORUS DOPING [J].
MONIWA, M ;
KUSUKAWA, K ;
OHKURA, M ;
TAKEDA, E .
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1993, 32 (1B) :312-317
[6]   APPEARANCE OF SINGLE-CRYSTALLINE PROPERTIES IN FINE-PATTERNED SI THIN-FILM TRANSISTORS (TFTS) BY SOLID-PHASE CRYSTALLIZATION (SPC) [J].
NOGUCHI, T .
JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS, 1993, 32 (11A) :L1584-L1587
[7]   A SUPER THIN-FILM TRANSISTOR IN ADVANCED POLY SI FILMS [J].
OHSHIMA, T ;
NOGUCHI, T ;
HAYASHI, H .
JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS, 1986, 25 (04) :L291-L293
[8]   ELECTRICAL PROPERTIES OF POLYCRYSTALLINE SILICON FILMS [J].
SETO, JYW .
JOURNAL OF APPLIED PHYSICS, 1975, 46 (12) :5247-5254