Response of head suspension interconnect at 1 GHz

The results of PSPICE simulations of suspension interconnects connecting ultra-fast write drivers to a write head capable of 1 GHz electronic reversal time are reported. The suspension interconnect is modeled as a distributed lumped circuit with parameters obtained from FEM-based simulations and include the effects of eddy currents. An ideal write-current driver in parallel with a capacitor and a damping resistor are assumed. Studies of the flux rise-time and flux pulse-shape are made varying the driver impedances and the geometries of the interconnects. Rise-times as low as Ins are demonstrated which correspond to the isolated head capability at 60ma. Implications with respect to interconnect design are discussed.