System level hardware/software partitioning based on simulated annealing and tabu search

被引：159

作者：

Eles, P ^{[1
]}

Peng, Z ^{[1
]}

Kuchcinski, K ^{[1
]}

Doboli, A ^{[1
]}

机构：

[1] TECH UNIV TIMISOARA, DEPT COMP SCI & ENGN, RO-1900 TIMISOARA, ROMANIA

来源：

DESIGN AUTOMATION FOR EMBEDDED SYSTEMS | 1997年 / 2卷 / 01期

关键词：

hardware/software partitioning; co-synthesis; iterative improvement heuristics; simulated annealing; tabu search;

D O I：

10.1023/A:1008857008151

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents two heuristics for automatic hardware/software partitioning of system level specifications. Partitioning is performed at the granularity of blocks, loops, subprograms, and processes with the objective of performance optimization with a limited hardware and software cost. We define the metric values for partitioning and develop a cost function that guides partitioning towards the desired objective. We consider minimization of communication cost and improvement of the overall parallelism as essential criteria during partitioning. Two heuristics for hardware/software partitioning, formulated as a graph partitioning problem, are presented: one based on simulated annealing and the other on tabu search. Results of extensive experiments, including real-life examples, show the clear superiority of the tabu search based algorithm.

引用

页码：5 / 32

页数：28

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