Examination of electrostatic potential distribution across an implanted p-n junction by electron holography

In the manufacture of semiconductor microelectronic devices, a p-n junction is formed usually by implanting a high concentration of impurity into a less heavily doped region and then heat annealing. A Si / Si p-n junction test sample has been made following the above practical process and thinned for electron holographic observation by using argon ion-milling. From the reconstructed phase image, the phase shift induced by potential drop across p-n junction can be seen clearly. To characterize quantitatively this potential drop, the mean inner potential V-0 of silicon was measured precisely by electron holographic method. By measuring 25 different crystalline silicon spheres with diameter ranging from 40 to 170 nm, an average result of V-0 = 12.16 +/- 0.83 V was obtained. By using this V-0 value, a quantitative measurement yields the potential drop similar to0.70 V, which is reasonably consistent with expected Si / Si junction parameter. The thickness of electric dead layer in depletion region produced from this measuring is similar to20 nm on each sample surface.