Resizing rules for MOS analog-design reuse

被引：16

作者：

Galup-Montoro, C ^{[1
]}

Schneider, MC ^{[1
]}

Coitinho, RM ^{[1
]}

机构：

[1] Univ Fed Santa Catarina, BR-88040900 Florianopolis, SC, Brazil

来源：

IEEE DESIGN & TEST OF COMPUTERS | 2002年 / 19卷 / 02期

关键词：

Analog circuits - Common source amplifier - Resizing rules - Voltage amplifier;

D O I：

10.1109/54.990442

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The migration of an analog circuit to a new technology usually requires a complete redesign With the procedure presented here, designers can calculate parameters for a given circuit in a new technology, starting from the same design in an earlier technology, The procedure's simple resizing rules have been verified with standard MOSFET simulation models.

引用

页码：50 / 58

页数：9

共 9 条

[1] An MOS transistor model for analog circuit design [J].

Cunha, AIA ;

Schneider, MC ;

Galup-Montoro, C .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1998, 33 (10) :1510-1519

[2] DESIGN OF ION-IMPLANTED MOSFETS WITH VERY SMALL PHYSICAL DIMENSIONS [J].

DENNARD, RH ;

GAENSSLEN, FH ;

YU, HN ;

RIDEOUT, VL ;

BASSOUS, E ;

LEBLANC, AR .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (05) :256-268

[3]

FOWLER M, SCALING WHY GIANTS D

[4]

GALILEI G, 1991, DIALOGUES CONCERNING

[5]

Laker K. R, 1994, DESIGN ANALOG INTEGR

[6]

NAUTA B, 1996, LOW POW LOW VOLT WOR, P1

[7] A multistage amplifier technique with embedded frequency compensation [J].

Ng, HT ;

Ziazadeh, RM ;

Allstot, DJ .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (03) :339-347

[8] A g(m)/I-D based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA [J].

Silveira, F ;

Flandre, D ;

Jespers, PGA .

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1996, 31 (09) :1314-1319

[9]

VITTOZ EA, 1990, P 1990 IEEE INT S CI, P1372

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