System partitioning on MCM using a new neural network model

被引:1
作者
Hu, WM [1 ]
Xu, JH
Yan, XL
He, ZJ
机构
[1] Peking Univ, Inst Comp Sci & Technol, Founder R&D Ctr, Beijing 100871, Peoples R China
[2] Hangzhou Inst Elect Engn, CAD Ctr, Hangzhou 310037, Peoples R China
[3] Zhejiang Univ, Dept Comp Sci & Engn, Hangzhou 310027, Peoples R China
来源
SCIENCE IN CHINA SERIES E-TECHNOLOGICAL SCIENCES | 1999年 / 42卷 / 03期
基金
中国博士后科学基金; 中国国家自然科学基金;
关键词
neural network; self-organizing; performance-driven; MCM; system partitioning;
D O I
10.1007/BF02916778
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
A new self-organizing neural network model is presented, which can get rid of some fatal defects facing the Kohonen self-organizing neural network, known as the slow training speed, difficulty in designing neighboring zone, and disability to deal with area constraints directly. Based on the new neural network, a new approach for performance-driven system partitioning on MCM is presented. In the algorithm, the total routing cost between the chips and the circle time are both minimized, while satisfying area and timing constraints. The neural network has a reasonable structure and its training speed is high. The algorithm is able to deal with the large scale circuit partitioning, and has total optimization effect. The algorithm is programmed with Visual C++ language, and experimental result shows that it is an effective method.
引用
收藏
页码:312 / 320
页数:9
相关论文
共 3 条
[1]  
Shen Tao, 1992, Chinese Journal of Computers, V15, P641
[2]  
Shen Tao, 1992, Acta Electronica Sinica, V20, P100
[3]   A NEURAL NETWORK DESIGN FOR CIRCUIT PARTITIONING [J].
YIH, JS ;
MAZUMDER, P .
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1990, 9 (12) :1265-1271