Scheduler modeling based on the controller synthesis paradigm

被引:72
作者
Altisen, K [1 ]
Gössler, G [1 ]
Sifakis, J [1 ]
机构
[1] Verimag, F-38610 Gieres, France
关键词
modeling real-time systems; scheduler design; controller synthesis; dynamic priorities; composability;
D O I
10.1023/A:1015346419267
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
The controller synthesis paradigm provides a general framework for scheduling real-time applications. Schedulers can be considered as controllers of the applications; they restrict their behavior so that given scheduling requirements are met. We study a modeling methodology based on the controller synthesis paradigm. The methodology allows to get a correctly scheduled system from timed models of its processes in an incremental manner, by application of composability results which simplify schedulability analysis. It consists in restricting successively the system to be scheduled by application of constraints defined from scheduling requirements. The latter are a conjunction of schedulability requirements that express timing properties of the processes and policy requirements about resource management. The presented methodology allows a unified view of scheduling theory and approaches based on timing analysis of models of real-time applications.
引用
收藏
页码:55 / 84
页数:30
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