Elimination of stress-induced defects in polybuffered LOCOS isolation scheme for sub-0.25 mu m designs

Decreasing field oxide thickness or (and) increasing field oxidation temperature up to 1100 degrees C, in a polybuffered local oxidation of silicon (PBL) isolation scheme, has a positive impact on field oxide thinning in small spacings, stress-induced voiding in small active areas, as well as on 5 nm thin gate oxide Q(BD). A low field oxide thickness and a high temperature field oxidation enable the use of 0.7 mu m pitch PBL for sub-0.25 mu m complementary metal oxide semiconductor designs. The transition of the bird's beak growth from a direct oxidation to a diffusion limited mechanism is consistent with the evolution of stress in the middle of active area as a function of field oxide thickness or field oxidation temperature.