A 113-dB SNR oversampling DAC with segmented noise-shaped scrambling

被引：90

作者：

Adams, R ^{[1
]}

Nguyen, KQ ^{[1
]}

Sweetland, K ^{[1
]}

机构：

[1] Analog Devices Inc, Wilmington, MA 01887 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1998年 / 33卷 / 12期

关键词：

digital-analog conversion; sigma-delta modulation;

D O I：

10.1109/4.735526

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A sigma-delta digital/analog converter implemented in 0.6-mu CMOS uses a 6-bit modulator together with a segmented noise-shaped scrambling scheme to achieve 113-dB A-weighted dynamic range over a 20-kHz bandwidth. A continuous-time output stage is used to achieve high signal-to-noise ratio in a 9.1-mm(2) die area. The output stage uses a dual return-to-zero circuit that eliminates errors caused by intersymbol interference.

引用

页码：1871 / 1878

页数：8

共 5 条

[1] A NOISE-SHAPING CODER TOPOLOGY FOR 15+ BIT CONVERTERS [J].