A custom mixed-signal CMOS integrated circuit for high performance PET tomograph front-end applications

被引:34
作者
Swann, BK [1 ]
Rochelle, JM
Binkley, DM
Puckett, BS
Blalock, BJ
Terry, SC
Moyers, JC
Young, JW
Casey, ME
Musrock, MS
Breeding, JE
机构
[1] Concorde Microsyst Inc, Knoxville, TN 37932 USA
[2] Univ Tennessee, Knoxville, TN 37966 USA
[3] Univ Tennessee, Knoxville, TN 37932 USA
[4] CPS Innovat, Knoxville, TN 37932 USA
关键词
CMOS integrated circuits; constant fraction discriminator (CFD); front-end electronics; nuclear pulse processing; positron emission tomography (PET); time to digital converter (TDC); variable gain amplifier (VGA);
D O I
10.1109/TNS.2003.814587
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A custom mixed-signal CMOS integrated circuit has been developed for high performance positron emission tomography (PET) front-end applications. The application specific integrated circuit (ASIC) contains four differential variable-gain constant bandwidth amplifiers, which receive buffered photomultiplier tube (PMT) voltage pulses. All four amplified PMT signals are summed by adding their outputs and feeding this sum to the timing channel of the ASIC. The timing channel, which consists of a constant fraction discriminator and subnanosecond time to digital converter, offers excellent PET count rate performance and randoms noise reduction through low deadtime (100 ns) and excellent timing resolution (312.5 ps LSB). Amplified PMT signals are also distributed to energy processing channels for lowpass filtering and buffering for subsequent digitization by external ADCs. The ASIC offers substantial size, power, and cost reductions over existing PET front-end discrete designs. Fabricated in a 5 V, 0.5 mum, triple metal, double poly, n-well CMOS process, the new ASIC has a die size of 20 mm(2) and dynamic power dissipation under 425 mW.
引用
收藏
页码:909 / 914
页数:6
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