Design and implementation of an untrimmed MOSFET-only 10-bit A/D converter with -79-dB THD

被引:51
作者
Hammerschmied, CM [1 ]
Huang, QT [1 ]
机构
[1] Swiss Fed Inst Technol, Integrated Syst Lab, CH-8092 Zurich, Switzerland
关键词
A/D converter; comparator; D/A converter; matching; successive approximation;
D O I
10.1109/4.705353
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A MOSFET-only 10-bit A/D converter is described which achieves a total harmonic distortion of up to -79 dB without trimming or calibration. The maximum conversion rate is 200 ksample/s. Implemented in a 1-mu m single-poly technology, it occupies 5.12 mm(2) and consumes 12 mW from a single 5-V supply. The MOSFET-only R-2R ladder, which is the center of the successive approximation architecture, is analyzed, and design considerations, especially the device dimensions, are given. Measurements of the linear behavior of pure MOSFET ladders are presented. The offset sensitivity of the ladder is examined, and an alternative way of summing the ladder current is suggested. A fast and effective differential current comparator is described.
引用
收藏
页码:1148 / 1157
页数:10
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