A FAST-SETTLING CMOS OP AMP FOR SC CIRCUITS WITH 90-DB DC GAIN

A technique is presented that combines the high-frequency behavior of a single-stage op amp with the high dc gain of a multistage design. Bode-plot measurements show a dc gain of 90 dB and a unity-gain frequency of 116 MHz (16-pF load). Settling measurements with a feedback factor of 1/3 show a fast single-pole settling behavior corresponding to a closed-loop bandwidth of 18 MHz (35-pF load) and a settling accuracy better than 0.03%. © 1990 IEEE