Programmable stream processors

被引:136
作者
Kapasi, UJ [1 ]
Rixner, S
Dally, WJ
Kailany, B
Ahn, JH
Mattson, P
Owens, JD
机构
[1] Stanford Univ, Concurrent VLSI Architecture Grp, Stanford, CA 94305 USA
[2] Rice Univ, Rice Comp Architecture Grp, Houston, TX 77251 USA
[3] Reservoir Labs, New York, NY USA
[4] Univ Calif Davis, Davis, CA 95616 USA
[5] Reservoir Labs, Portland, OR USA
关键词
D O I
10.1109/MC.2003.1220582
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The demand for flexibility in media processing motivates the use of programmable processors. However, very large-scale integration constraints limit the performance of traditional programmable architectures. In modern VLSI technology, computation is relatively cheap-thousands of arithmetic logic units operating at multigigahertz rates can fit on a modestly sized 1 square centimeter die. Yet delivering instructions and data to those ALUs is prohibitively expensive. The Imagine media processor validates the hypothesis that careful management of bandwidth and parallelism, from the programming language to the hardware, results in both high performance and high performance per unit of power.
引用
收藏
页码:54 / +
页数:10
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