Future semiconductor manufacturing - Challenges and opportunities

被引:20
作者
Iwai, H [1 ]
机构
[1] Tokyo Inst Technol, Frontier Collaborat Res Ctr, Midori Ku, Yokohama, Kanagawa 2268502, Japan
来源
IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST | 2004年
关键词
D O I
10.1109/IEDM.2004.1419051
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Recently, CMOS scaling has been accelerated very aggressively in both production and research levels. Already, sub-100 nm gate length CMOS LSIs are used for many applications in a huge volume and even transistor operation of 5 nm gate length CMOS was reported in a conference. However, many serious problems are expected for implementing smaller-geometry MOSFETs into large-scale integrated circuits even at the 45 nm (HP65nm) technology node. The skyrocketing increase of production costs is a serious concern and many people feel some kind of drastic evolution or even a revolution is required in order to continue several more generations towards 10 nm. In this paper, future semiconductor manufacturing challenges are described including the possible limits of scaling.
引用
收藏
页码:11 / 16
页数:6
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