In-depth physical investigation of GeOI pMOSFET by TCAD calibrated simulation

被引：13

作者：

Grandchamp, B. ^{[1
]}

Jaud, M-A. ^{[1
]}

Scheiblin, P. ^{[1
]}

Romanjek, K. ^{[1
]}

Hutin, L. ^{[1
]}

Le Royer, C. ^{[1
]}

Vinet, M. ^{[1
]}

机构：

[1] MINATEC, CEA LETI, F-38054 Grenoble, France

来源：

SOLID-STATE ELECTRONICS | 2011年 / 57卷 / 01期

关键词：

Germanium; Germanium-on-insulator; GeOI; MOSFET; TCAD; Simulation; INTERFACE-TRAP DENSITY; LATTICE-VIBRATIONS; METAL GATE; GERMANIUM; SILICON; SI; SCATTERING; ELECTRONS; MODEL; IMPLANTATION;

D O I：

10.1016/j.sse.2010.11.011

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

080906 [电磁信息功能材料与结构]; 082806 [农业信息与电气工程];

摘要：

Simulations of germanium-on-insulator fully-depleted pMOSFET have been performed from process to device using 2D Silvaco software and compared with experimental results. A comprehensive study of these experimental results allows enlightening the specificity of GeOI devices and leads to a good description of electrical output characteristics at low and high drain-to-source voltage and for various gate lengths. More specifically, the adaptation of mobility model from silicon to germanium, a correct description of interface trap densities and a good consideration of leakage current mechanisms are the main challenges addressed in this paper for GeOI pMOSFET simulation. (C) 2010 Elsevier Ltd. All rights reserved.

引用

页码：67 / 72

页数：6

共 30 条

[1]

Comparison of device performance and scaling capability of thin-body GOI and SOI MOSFETs [J].