Embedded ferroelectric memory technology with completely encapsulated hydrogen barrier structure

被引：8

作者：

Nagano, Y ^{[1
]}

Mikawa, T

Kutsunai, T

Natsume, S

Tatsunari, T

Ito, T

Noma, A

Nasu, T

Hayashi, S

Hirano, H

Gohou, Y

Judai, Y

Fujii, E

机构：

[1] ULSI Proc, Technol Dev Ctr, Kyoto 6018413, Japan

[2] SystTechnol LSI Technol Dev Ctr, Nagaokakyo, Kyoto 6178520, Japan

来源：

IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING | 2005年 / 18卷 / 01期

关键词：

ferroelectric memory; hydrogen barrier; low-voltage operation; reliability;

D O I：

10.1109/TSM.2004.841821

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

A 0.18-mum system LSI embedded ferroelectric memory (FeRAM) operating at a very low voltage has been developed for the first time. The low-voltage operation has been attained by newly developed stacked ferroelectric capacitors completely encapsulated by hydrogen barriers, which enable us to eliminate hydrogen reduction of the ferroelectric thin film during the back end of the line process including FSG, tungsten CVD (W-CVD), and plasma CVD SiN (p-SiN) passivation. A fabricated 1-Mbit one-transistor one-capacitor SrBi2(TaxNb1-x)(2)O-9 (SBTN)-based embedded FeRAM operates at a low voltage of 1.1 V and ensures-the endurance cycles up to 10(12) at 85 degreesC and the data retention time up to 1000 h at 125 degreesC, which is the most promising for mass production of 0.18-mum low-power system LSI-embedded FeRAM and beyond.

引用

页码：49 / 54

页数：6

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