Stress dependence and poly-pitch scaling characteristics of (110) PMOS drive current

被引：22

作者：

Yang, B. ^{[1
]}

Nummy, K. ^{[2
]}

Waite, A. ^{[1
]}

Black, L. ^{[1
]}

Gossmann, H. ^{[1
]}

Yin, H. ^{[2
]}

Liu, Y. ^{[2
]}

Kim, B. ^{[2
]}

Narasimha, S. ^{[2
]}

Fisher, P. ^{[1
]}

Meer, H. V. ^{[1
]}

Johnson, J. ^{[2
]}

Chidambarrao, D. ^{[2
]}

Kim, S. D. ^{[2
]}

Sheraw, C. ^{[2
]}

Wehella-gamage, D. ^{[2
]}

Holt, J. ^{[2
]}

Chen, X. ^{[2
]}

Park, D. ^{[2
]}

Sung, C. Y. ^{[2
]}

Schepis, D. ^{[2
]}

Khare, M. ^{[2
]}

Liming, S. ^{[1
]}

Agnello, P. ^{[2
]}

机构：

[1] Adv Micro Devices Inc, Hopewell Jct, NY 12533 USA

[2] IBM Syst & Technol Grp, Hopewell Jct, NY 12533 USA

来源：

2007 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS | 2007年

关键词：

D O I：

10.1109/VLSIT.2007.4339753

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This work demonstrates that the similar to 2x mobility advantage of (110) PMOS over (100) PMOS is maintained down to 190nm poly-pitch for devices under compressive stress. (110) PMOS with 3.5GPa compressively stressed liners demonstrate strong channel drives with I-on=800 mu A/mu m at I-off=100nA/mu m (V-dd=1.0V) for 190nm poly-pitch, the highest reported to date for 45-nm-node (110) PMOS using conventional gate dielectrics without eSiGe stressors. Additionally, (110) PMOS show better scalability, with 15% smaller total I-on degradation than (100) PMOS when poly-pitch scales from 250nm to 190nm.

引用

页码：126 / +

页数：2

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