Enhanced tunneling current effect for nonvolatile memory applications

被引：15

作者：

Govoreanu, B ^{[1
]}

Blomme, P ^{[1
]}

Van Houdt, J ^{[1
]}

De Meyer, K ^{[1
]}

机构：

[1] IMEC, SPDT Div, B-3001 Louvain, Belgium

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS | 2003年 / 42卷 / 4B期

关键词：

nonvolatile memory; tunnel barrier; enhanced. tunneling current; low-voltage programming; high-k dielectric materials;

D O I：

10.1143/JJAP.42.2020

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

High-k insulators are currently considered for SiO2 replacement as gate dielectrics in sub-100nm complementary metal-oxide-semiconductor (CMOS) technology nodes. The use of double-layer high-k stacks as tunnel dielectrics could bring important benefits in the nonvolatile memory operation by either reducing the operating voltages and/or increasing the, programming speed. In this paper, the influence of the high-k parameters on the tunneling current and requirements for achieving higher programming speed without compromising retention are discussed. We show that enhancement of the tunneling current is possible with two-layer low-k/high-k dielectric stacks and confirm the theoretical results based on our experimental data.

引用

页码：2020 / 2024

页数：5

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