A high bit resolution FPGA implementation of a FNN with a new algorithm for the activation function

被引:52
作者
Ferreira, Pedro
Ribeiro, Pedro
Antunes, Ana
Dias, Fernando Morgado
机构
[1] Univ Madeira, Dept Matemat & Engn, P-9000390 Funchal, Madeira, Portugal
[2] Univ Madeira, CCM, P-9000390 Funchal, Madeira, Portugal
[3] Inst Politecn Setubal, Escola Super Tecnol Setubal, Dept Engn Electrotecn, P-2914508 Estefanilha, Setubal, Portugal
关键词
FPGA; feedforward neural networks; hardware; VHDL;
D O I
10.1016/j.neucom.2006.11.028
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Several implementations of Feedforward Neural Networks have been reported in scientific papers. These implementations do not allow the direct use of off-line trained networks. Usually, the problem is the lower precision (compared to the software used for training) or modifications in the activation function. In the present work, a hardware solution called Artificial Neural Network Processor, using a FPGA, fits the requirements for a direct implementation of Feedforward Neural Networks, because of the high precision and accurate activation function that were obtained. The resulting hardware solution is tested with data from a real system to confirm that it can correctly implement the models prepared off-line with MATLAB. (c) 2007 Elsevier B.V. All rights reserved.
引用
收藏
页码:71 / 77
页数:7
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