Algorithms and data structures for flash memories

被引：370

作者：

Gal, E ^{[1
]}

Toledo, S ^{[1
]}

机构：

[1] Tel Aviv Univ, Sch Comp Sci, IL-69978 Tel Aviv, Israel

来源：

ACM COMPUTING SURVEYS | 2005年 / 37卷 / 02期

关键词：

algorithms; performance; reliability; flash memory; EEPROM memory; wear leveling;

D O I：

10.1145/1089733.1089735

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

Flash memory is a type of electrically-erasable programmable read-only memory (EEPROM). Because flash memories are nonvolatile and relatively dense, they are now used to store files and other persistent objects in handheld computers, mobile phones, digital cameras, portable music players, and many other computer systems in which magnetic disks are inappropriate. Flash, like earlier EEPROM devices, suffers from two limitations. First, bits can only be cleared by erasing a large block of memory. Second, each block can only sustain a limited number of erasures, after which it can no longer reliably store data. Due to these limitations, sophisticated data structures and algorithms are required to effectively use flash memories. These algorithms and data structures support efficient not-in-place updates of data, reduce the number of erasures, and level the wear of the blocks in the device. This survey presents these algorithms and data structures, many of which have only been described in patents until now.

引用

页码：138 / 163

页数：26

共 38 条

[11]

Chiang ML, 1999, SOFTWARE PRACT EXPER, V29, P267, DOI 10.1002/(SICI)1097-024X(199903)29:3<267::AID-SPE233>3.0.CO

[12]

2-T

[13]

DABERKO N, 1998, Patent No. 5787445

[14]

DAN R, 1997, 80SR002006L

[15]

Douglis F., 1994, Proceedings of the First USENIX Symposium on Operating Systems Design and Implementation (OSDI), P25

[16]

HAN SW, 2000, Patent No. 6016275

[17]

*INT CORP, 1998, 648 INT CORP

[18]

*INT CORP, 1998, 686 INT CORP

[19]

JOU E, 1996, Patent No. 5568423

[20]

KAWAGUCHI A, 1995, PROCEEDINGS OF THE 1995 USENIX TECHNICAL CONFERENCE, P155

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