A low-voltage integrated CMOS analog lock-in amplifier prototype for LAPS applications

A first version of a low supply voltage (2 V) fully integrated lock-in amplifier, designed in a standard CMOS technology (AMS 0.6 mu), is presented. Two different 1 KHz and 10 KHz signals, embedded in noise, have been considered for the lock-in test, where the signal to noise (SIN) ratio has been taken less than 0.1. The amplifier shows low input equivalent voltage noise, being less than 20 nV/(Hz)(1/2) at the considered frequencies. The theoretical dynamic reserve, a typical lock-in quality factor which gives a direct measure of the worst-case signal-to-noise ratio, has been determined to be greater than 60 dB at 1 KHz input frequency. The circuit has been tested with a typical light addressable potentiometric sensors (LAPS) waveform, embedded in noise and the signal has been completely recovered. (C) 2001 Elsevier Science B.V. All rights reserved.