Investigation of poly-Si1-xGex for dual-gate CMOS technology

被引:21
作者
Lee, WC [1 ]
King, YC [1 ]
King, TJ [1 ]
Hu, CM [1 ]
机构
[1] Univ Calif Berkeley, Dept EECS, Berkeley, CA 94720 USA
基金
美国国家科学基金会;
关键词
D O I
10.1109/55.701432
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Poly-Si1-xGex-gated MOS capacitors were fabricated with x varying from 0 to 0.5. NMOS and PMOS C-V characteristics were measured. Reduced poly-gate depletion effect (PDE) was observed in PMOS devices with increasing Ge mole fraction; while for NMOS, devices with a Ge content similar to 20% exhibit the least PDE. Higher active dopant concentration and reduced gate-depletion width for devices featuring less PDE were confirmed. Work function difference (Phi(MS)) was found to, decrease slightly in N+ films and significantly in P+ films as Ge content increases. The shift in Phi(MS) for N+ poly-Si1-xGex is negligible while it is -0.13 V for P+ Si0.8Ge0.2 and -0.32 V for P+ Si0.5Ge0.5. The reduction in energy bandgap (Delta E-g) was also determined to increase from 0 to 0.26 eV as Ge content increases from 0 to 50%. For deep submicron dual-gate CMOS application, the shift in Phi(MS) should be minimized for low and symmetrical Vth as well as improved short-channel effect (SCE). A Ge content of similar to 20% therefore seems to offer the best tradeoff between SCE and PDE.
引用
收藏
页码:247 / 249
页数:3
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