Custom circuit design as a driver of microprocessor performance

被引:22
作者
Allen, DH
Dhong, SH
Hofstee, HP
Leenstra, J
Nowka, KJ
Stasiak, DL
Wendel, DF
机构
[1] IBM Corp, Server Technol Dev, Rochester, MN 55901 USA
[2] IBM Corp, Div Res, Austin Res Lab, Austin, TX 78758 USA
[3] IBM Syst, Div 390, Boeblingen Dev Lab, D-71032 Boblingen, Germany
关键词
D O I
10.1147/rd.446.0799
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents a survey of some of the most aggressive custom designs for CMOS processor products and prototypes in IBM. We argue that microprocessor performance growth, which has traditionally been driven primarily by CMOS technology and microarchitectural improvements, can receive a substantial contribution from improvements in circuit design and physical organization. We predict that in future microprocessor designs the floorplan and wire plan will be as important as the microarchitecture, more control logic will be structured and become indistinguishable from dataflow elements, and more circuits will be designed and analysed at the level of single transistors and wires.
引用
收藏
页码:799 / 822
页数:24
相关论文
共 37 条
[1]   A 0.2-μm, 1.8-V, SOI, 550-MHz, 64-b PowerPC microprocessor with copper interconnects [J].
Aipperspach, AG ;
Allen, DH ;
Cox, DT ;
Phan, NV ;
Storino, SN .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (11) :1430-1435
[2]  
ALLEN D, 1999, Patent No. 6002292
[3]  
ALLER I, 2000, ISSCC, P214
[4]  
BERNSTEIN K, 1999, DESIGN HIGH PERFORMA
[5]   A multithreaded PowerPC processor for commercial servers [J].
Borkenhagen, JM ;
Eickemeyer, RJ ;
Kalla, RN ;
Kunkel, SR .
IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 2000, 44 (06) :885-898
[6]  
Bowhill W. J., 1995, Digital Technical Journal, V7, P100
[7]  
BUCHHOLTZ T, 2000, ISSCC, P88
[8]   A 2-NS CYCLE, 3.8-NS ACCESS 512-KB CMOS ECL SRAM WITH A FULLY PIPELINED ARCHITECTURE [J].
CHAPPELL, TI ;
CHAPPELL, BA ;
SCHUSTER, SE ;
ALLAN, JW ;
KLEPNER, SP ;
JOSHI, RV ;
FRANCH, RL .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1991, 26 (11) :1577-1585
[9]   SOI for digital CMOS VLSI: Design considerations and advances [J].
Chuang, CT ;
Lu, PF ;
Anderson, CJ .
PROCEEDINGS OF THE IEEE, 1998, 86 (04) :689-720
[10]  
DAVIES A, 1999, METHOD APPARATUS USI