The impact of devices type and sizing on phase noise mechanisms

Phase noise mechanisms in integrated LC voltage-controlled. oscillators (VCOs) using MOS transistors are investigated. The degradation in phase noise due to low-frequency bias noise is shown to be a function of AM-PM conversion in the MOS switching transistors. By exploiting this dependence, bias noise contributions to phase noise are minimized through MOS device sizing rather than through filtering. NMOS and PMOS VCO designs are compared in terms of thermal noise. Short-channel MOS considerations explain why 0.18-mum PMOS devices can attain better phase noise than 0.18-mum NMOS devices in the 1/f(2) region. Phase noise in the 1/f(3) region is primarily dependent upon the upconversion of flicker noise from the MOS switching transistors rather than from the bias circuit, and can be,improved by decreasing MOS switching device size. Measured results on an experimental set-of VCOs confirm the dependencies predicted by analysis. A 5.3-GHz all-PMOS VCO topology demonstrates measured phase noise of -124 dBc/Hz at 1-MHz offset and -100 dBc/Hz at 100-kHz offset while dissipating 13.5 mW from a 1.8-V supply using a 0.18-mum SiGe BiCMOS process.