A versatile 0.13 μm CMOS Platform Technology supporting High Performance and Low Power Applications

被引：30

作者：

Perera, AH ^{[1
]}

Smith, B ^{[1
]}

Cave, N ^{[1
]}

Sureddin, M ^{[1
]}

Chheda, S ^{[1
]}

Singh, R ^{[1
]}

Islam, R ^{[1
]}

Chang, J ^{[1
]}

Song, SC ^{[1
]}

Sultan, A ^{[1
]}

Crown, S ^{[1
]}

Kolagunta, V ^{[1
]}

Shah, S ^{[1
]}

Celik, M ^{[1
]}

Wu, D ^{[1
]}

Yu, KC ^{[1
]}

Fox, R ^{[1
]}

Park, S ^{[1
]}

Simpson, C ^{[1
]}

Eades, D ^{[1
]}

Gonzales, S ^{[1
]}

Thomas, C ^{[1
]}

Sturtevant, J ^{[1
]}

Bonser, D ^{[1
]}

Benavides, N ^{[1
]}

Thompson, M ^{[1
]}

Sheth, V ^{[1
]}

Fretwell, J ^{[1
]}

Kim, S ^{[1
]}

Ramani, N ^{[1
]}

Green, K ^{[1
]}

Moosa, M ^{[1
]}

Besser, P ^{[1
]}

Solomentsev, Y ^{[1
]}

Denning, D ^{[1
]}

Friedemann, M ^{[1
]}

Baker, B ^{[1
]}

Chowdhury, R ^{[1
]}

Ufmani, S ^{[1
]}

Strozewski, K ^{[1
]}

Carter, R ^{[1
]}

Reiss, J ^{[1
]}

Olivares, M ^{[1
]}

Ho, B ^{[1
]}

Lii, T ^{[1
]}

Sparks, T ^{[1
]}

Stephens, T ^{[1
]}

Schaller, M ^{[1
]}

Goldberg, C ^{[1
]}

Junker, K ^{[1
]}

机构：

[1] Motorola Inc, DigitalDNA Labs, Austin, TX 78721 USA

来源：

INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST | 2000年

关键词：

D O I：

10.1109/IEDM.2000.904384

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A modular 0.13 mum CMOS platform has been developed to support a wide range of applications [1,2], including embedded non-volatile memory (NVM). The high performance core device with a 18 A gate oxide supports the high end needs of the technology. In addition, medium performance and low leakage 25 Angstrom devices are provided in the technology platform to service the low power applications, with low off-state leakage. The peripheral I/O devices support both 2.5V (50 Angstrom) and 3.3V (70 Angstrom) interfaces. Gate lengths range from 110 to 80 nm. Optical enhancement techniques allow use of 248 nm KrF lithography to meet the patterning needs. The interconnect technology allows for two low-k dielectric options with K-values in the range from 2.9 to 3.6. Aggressive design rules, fully compatible with 248 nm KrF systems allow for high logic densities and a 2.48 um(2) 6T embedded SRAM cell. The technology has been exercised using a 4MB SRAM test vehicle with good yields.

引用

页码：571 / 574

页数：4

共 3 条

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