Ultrahigh capacitance density for multiple ALD-grown MIM capacitor stacks in 3-D silicon

被引：129

作者：

Klootwijk, J. H. ^{[1
]}

Jinesh, K. B. ^{[2
]}

Dekkers, W. ^{[1
]}

Verhoeven, J. F. ^{[1
]}

van den Heuvel, F. C. ^{[1
]}

Kim, H. -D. ^{[3
]}

Blin, D. ^{[4
]}

Verheijen, M. A. ^{[1
]}

Weemaes, R. G. R. ^{[1
]}

Kaiser, M. ^{[1
]}

Ruigrok, J. J. M. ^{[2
]}

Roozeboom, F.

机构：

[1] Philips Res Labs, NL-5656 Eindhoven, Netherlands

[2] NXP TSMC Res Ctr, Eindhoven, Netherlands

[3] Jusung Engn, Gyunggi Do 464890, South Korea

[4] Jusung Engn Europe, F-38920 Crolles, France

来源：

IEEE ELECTRON DEVICE LETTERS | 2008年 / 29卷 / 07期

关键词：

atomic-layer deposition (ALD); deep reactive ion etching (DRIE); equivalent series inductance (ESL); equivalent series resistance (ESR); Fowler-Nordheim (FN) tunneling; high-density capacitors; high-k dielectrics; low pressure chemical vapor deposition (LPCVD); macropore arrays; metal-insulator-metal (MIM); reactive ion etching (RIE); silicon devices; 3D silicon;

D O I：

10.1109/LED.2008.923205

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Trench capacitors containing multiple metalinsulator-metal (MIM) layer stacks are realized by atomic-layer deposition (ALD), yielding an ultrahigh capacitance density of 440 nF/mm(2) at a breakdown voltage V-BD > 6 V. This capacitance density on silicon is at least 10x higher than the values reported by other research groups. On a silicon substrate containing high-aspect-ratio macropore arrays, alternating MIM layer stacks comprising high-k Al2O3 dielectrics and TiN electrodes are deposited using optimized ALD processing such that the conductivity of the TiN layers is not attacked. Ozone annealing subsequent to each Al2O3 deposition step yields significant improvement of the dielectric isolation and breakdown properties.

引用

页码：740 / 742

页数：3

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