Optimization of silicon microstrip detector design for CLEO III

被引：24

作者：

Hopman, PI

Alexander, JP

Foland, AD

Kim, PC

Ward, CW

机构：

[1] CORNELL UNIV,DEPT PHYS,ITHACA,NY 14853

[2] CORNELL UNIV,NUCL STUDIES LAB,ITHACA,NY 14853

来源：

NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT | 1996年 / 383卷 / 01期

关键词：

D O I：

10.1016/S0168-9002(96)00662-6

中图分类号：

TH7 [仪器、仪表];

学科分类号：

0804 ; 080401 ; 081102 ;

摘要：

We present measurements from prototype silicon microstrip detectors for the CLEO III silicon vertex detector. Noise and capacitance optimization is discussed. We also present a design to achieve 10 pF total capacitance on a double sided, double metal silicon detector.

引用

页码：98 / 103

页数：6

共 5 条

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