High performance pMOSFET with BF3 plasma doped gate/source/drain and S/D extension

被引：16

作者：

Ha, JM ^{[1
]}

Park, JW ^{[1
]}

Kim, WS ^{[1
]}

Kim, SP ^{[1
]}

Song, WS ^{[1
]}

Kim, HS ^{[1
]}

Song, HJ ^{[1
]}

Fujihara, K ^{[1
]}

Kang, HK ^{[1
]}

Lee, MY ^{[1
]}

Felch, S ^{[1
]}

Jeong, U ^{[1
]}

Goeckner, M ^{[1
]}

Shim, KH ^{[1
]}

Kim, HJ ^{[1
]}

Cho, HT ^{[1
]}

Kim, YK ^{[1
]}

Ko, DH ^{[1
]}

Lee, GC ^{[1
]}

机构：

[1] Samsung Elect Co Ltd, Semicond R&D Ctr, Kyonggi Do 449900, South Korea

来源：

INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST | 1998年

关键词：

D O I：

10.1109/IEDM.1998.746439

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

BF3 Plasma doping (PLAD) process has been utilized in source/drain/gate and shallow S/D extension for high performance 0.18 mu m pMOSFET. Gale oxide reliability, drain current, and transconductance of pMOSFET with BF3 PLAD are remarkably improved compared to those of BF2 ion implanted devices. Cobalt salicide formation is also well compatible with plasma doped S/D junction.

引用

页码：639 / 642

页数：4

共 4 条

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