Leading zero anticipation and detection - A comparison of methods

被引：75

作者：

Schmookler, MS

Nowka, KJ

机构：

来源：

ARITH-15 2001: 15TH SYMPOSIUM ON COMPUTER ARITHMETIC, PROCEEDINGS | 2001年

关键词：

D O I：

10.1109/ARITH.2001.930098

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Design of the leading zero anticipator (LZA) or detector (LZD) is pivotal to the normalization of results for addition and fused multiplication-addition in high-performance floating point processors. This paper formalizes the analysis and describes some alternative organizations and implementations from the known art. It shows how choices made in the design are often dependent on the overall design of the addition unit, on how subtraction is handled when the exponents are the same, and on how it detects and corrects for the possible one-bit error of the LZA.

引用

页码：7 / 12

页数：6

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