Technology challenges and solutions for 1Gbit and beyond

被引：5

作者：

Mazure, C ^{[1
]}

Alsmeier, J

Dehm, C

Honlein, W

机构：

[1] Siemens AG, Semicond Grp, D-81541 Munich, Germany

[2] Siemens Microelect Inc, Hopewell Junction, NY 12533 USA

来源：

INTEGRATED FERROELECTRICS | 1998年 / 21卷 / 1-4期

关键词：

DRAM; BST; trench cell;

D O I：

10.1080/10584589808202047

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The need for higher DRAM densities, for cost effective manufacturing and the price pressure puts the DRAM development on a highly innovative path. The fast pace with which DRAM cell sizes are reduced results in many technology issues. This talk discusses the deep trench cell architecture, its advantages and the main technology innovations that have made the aggressive scaling of the DRAM cell possible. The issues related to Gbit DRAMs, the new challenges and potential innovations will be presented.

引用

页码：15 / 25

页数：11

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