A 900-MHz 2.5-mA CMOS frequency synthesizer with an automatic SC tuning loop

被引:98
作者
Lin, TH [1 ]
Kaiser, WJ [1 ]
机构
[1] Univ Calif Los Angeles, Dept Elect Engn, Los Angeles, CA 90095 USA
关键词
frequency synthesizer; phase-locked loop; VCO;
D O I
10.1109/4.910481
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 900-MHz phase-locked loop frequency synthesizer implemented in a 0.6-mum CMOS technology is developed for the Wireless Integrated Network Sensors applications. It incorporates an automatic switched-capacitor (SC) discrete-tuning loop to extend the overall frequency tuning range to 20%, while the VCO gain (K-VCO) resulting from the CMOS varactor continuous-tuning is kept low at only 20 MHz/V in order to improve the reference spurs and noise performance. This frequency synthesizer achieves a phase noise of -102 dBc/Hz at 100 kHz offset frequency and reference spurs below -55 dBc. The synthesizer, including an on chip VCO, dissipates only 2.5 mA from a 3-V supply.
引用
收藏
页码:424 / 431
页数:8
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