Compact low-power calibration mini-DACs for neural arrays with programmable weights

被引:34
作者
Linares-Barranco, B [1 ]
Serrano-Gotarredona, T [1 ]
Serrano-Gotarredona, R [1 ]
机构
[1] CSIC, CNM, IMSE, Seville 41012, Spain
来源
IEEE TRANSACTIONS ON NEURAL NETWORKS | 2003年 / 14卷 / 05期
关键词
analog design; calibration; current splitters; digital-to-analog converters; fuzzy circuits; neural networks; subthreshold; weak inversion;
D O I
10.1109/TNN.2003.816370
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
This paper considers the viability of compact low-resolution low-power mini digital-to-analog converters (mini-DACs) for use in large arrays of neural type cells, where programmable weights are required. Transistors are biased in weak inversion in order to yield small currents and low power consumptions, a necessity when building large size arrays. One important drawback of weak inversion operation is poor matching between transistors. The resulting effective precision of a fabricated array of 50 DACs turned out to be 47% (1.1,bits), due to transistor mismatch. However, it is possible to combine them two by two in order to build calibrated DACs, thus compensating for inter-DAC mismatch. It is shown experimentally that the precision can be improved easily by a factor of 10 (4.8% or 4.4 bits), which makes these DACs viable for low-resolution applications such as massive arrays of neural processing circuits. A design methodology is provided, and illustrated through examples, to obtain calibrated mini-DACs of a given target precision. As an example application, we show simulation results of using this technique to calibrate an array of digitally controlled integrate-and-fire neurons.
引用
收藏
页码:1207 / 1216
页数:10
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