Design issues in CMOS differential LC oscillators

被引:651
作者
Hajimiri, A [1 ]
Lee, TH
机构
[1] CALTECH, Pasadena, CA 91125 USA
[2] Stanford Univ, Ctr Integrated Syst, Stanford, CA 94305 USA
关键词
design methodology; noise measurement; oscillator noise; oscillator stability; phase jitter; phase-locked loops; phase noise; voltage-controlled oscillators;
D O I
10.1109/4.760384
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
An analysis of phase noise in differential cross-coupled inductance-capacitance (LC) oscillators is presented. The effect of tail current and tank power dissipation on the voltage amplitude is shown, Various noise sources in the complementary cross-coupled pair are identified, and their effect on phase noise is analyzed. The predictions are in good agreement with measurements over a large range of tail currents and supply voltages. A 1.8-GHz LC oscillator with a phase noise of -121 dBc/Hz at 600 kHz is demonstrated, dissipating 6 mW of power using on-chip spiral inductors.
引用
收藏
页码:717 / 724
页数:8
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