Challenges for on-chip interconnects

被引:12
作者
Cadien, KC [1 ]
Reshotko, MR [1 ]
Block, BA [1 ]
Bowen, AM [1 ]
Kencke, DL [1 ]
Davids, P [1 ]
机构
[1] Intel Corp, Hillsboro, OR 97124 USA
来源
Optoelectronic Integration on Silicon II | 2005年 / 5730卷
关键词
interconnect; integrated circuit; optical;
D O I
10.1117/12.591163
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
As integrated circuit interconnect dimensions continue to shrink and signaling frequencies increase, interconnect performance degrades. The performance degradation is due to several factors such as power consumption, cross-talk, and signal attenuation. On-chip optical interconnects are a potential solution to these scaling issues because they offer the promise of providing higher bandwidth. In this paper, progress on the major on-chip optical building blocks will be reviewed. It will be shown that significant advances have been made in the design and fabrication of waveguides, detectors, and couplers. However, major challenges in high speed electrical to optical conversion and signaling remain.
引用
收藏
页码:133 / 143
页数:11
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