Mechanical stress effect of etch-stop nitride and its impact on deep submicron transistor design

被引：181

作者：

Ito, S ^{[1
]}

Namba, H ^{[1
]}

Yamaguchi, K ^{[1
]}

Hirata, T ^{[1
]}

Ando, K ^{[1
]}

Koyama, S ^{[1
]}

Kuroki, S ^{[1
]}

Ikezawa, N ^{[1
]}

Suzuki, T ^{[1
]}

Saitoh, T ^{[1
]}

Horiuchi, T ^{[1
]}

机构：

[1] NEC Corp Ltd, ULSI Device Dev Div, Sagamihara, Kanagawa 2291198, Japan

来源：

INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST | 2000年

关键词：

D O I：

10.1109/IEDM.2000.904303

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper, focusing on the effect of a plasma-enhanced CVD (PECVD) nitride contact-etch-stop layer, reports that process-induced mechanical stress affects the performance of short-channel CMOSFETs. We argue that the internal stress in the nitride layer changes transconductance (G(m)), thereby degrading NMOSFET performance by up to 8% and improving PMOSFET performance up to 7%. These performance changes are caused by changes of the electron and hole mobilities, so a precise transistor model considering this mobility change is necessary for deep-submicron transistor design.

引用

页码：247 / 250

页数：4

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