Analysis of bias stress on thin-film transistors obtained by Hot-Wire Chemical Vapour Deposition

被引:26
作者
Dosev, DK
Puigdollers, J [1 ]
Orpella, A
Voz, C
Fonrodona, M
Soler, D
Marsal, LF
Pallarès, J
Bertomeu, J
Andreu, J
Alcubilla, R
机构
[1] Univ Politecn Catalunya, Dept Elect Engn, Barcelona, Spain
[2] Univ Rovira & Virgili, Dept Engn Elect Elect & Automat, Tarragona, Spain
[3] Univ Barcelona, Dept Fis Aplicada & Opt, Barcelona, Spain
关键词
TFT; nanocrystalline silicon; HWCVD; stability;
D O I
10.1016/S0040-6090(00)01608-4
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
The stability under gate bias stress of unpassivated thin film transistors was studied by measuring the transfer and output characteristics at different temperatures. The active layer of these devices consisted of in nanocrystalline silicon deposited at 125 degreesC by Hot-Wire Chemical Vapour Deposition. The dependence of the subthreshold activation energy on gate bias for different gate bias stresses is quite different from the one reported for hydrogenated amorphous silicon. This behaviour has been related to trapped charge in the active layer of the thin film transistor. (C) 2001 Elsevier Science B.V. All rights reserved.
引用
收藏
页码:307 / 309
页数:3
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