Modeling and analysis of high-speed links

被引：93

作者：

Stojanovic, V ^{[1
]}

Horowitz, M ^{[1
]}

机构：

[1] Stanford Univ, Stanford, CA 94305 USA

来源：

PROCEEDINGS OF THE IEEE 2003 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2003年

关键词：

D O I：

10.1109/CICC.2003.1249467

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Very low bit error rate (BER) requirements for the operation of a high-speed link system, require a very precise analysis of the link performance in order to prevent unrealistic specifications on both IC design and communication algorithm development. This paper presents the analysis of the noise and distortion sources in a high-speed link system, and their impact on the choice and effectiveness of different communication techniques. Phase-locked loop and clock-and-data recovery loop modeling is also described. It is shown that the most dominant noise and distortion sources are colored and bounded, as opposed to standard unbounded Gaussian white noise assumptions, which yield large errors in the estimation of the link performance and comparison of different signaling techniques. With very low BER requirements, shape of probability distribution of noise and distortion sources and their correlations, are much more important than just their total power, which contrasts the standard analysis in communication systems.

引用

页码：589 / 594

页数：6

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