4H-SiC MOSFET's utilizing the H2 surface cleaning technique

The H-2 cleaning technique was examined as the precleaning of the gate oxidation for 4H-SiC MOSFET's. The device had a channel width and length of 150 and 100 mu m, fabricated on the p-type epitaxial layer of 3 x 10(16) cm(-3). The gate oxidation was performed after the conventional RCA cleaning, and H-2 annealing at 1000 degrees C. The obtained channel mobility depends on the pre-cleaning process strongly, and was achieved 20 cm(2)/V.s in the H-2 annealed sample. The effective interface-state density was also measured by the MOS capacitors fabricated on the same chips, resulting 1.8 x 10(12) cm(-2) from the photo-induced C-V method.